#ifdef INI_SUPPORT
#include "stdio.h"
#include "verilog_test.h" 
#include "HostPtmfApi.h"
#include "mem.h"
#include "apiosmacro.h"
#include "string.h"
#if 0
void EventLog(const char *output, ...)
{

}
#endif

extern void BmeNIreset(void);
extern void BmeNIconfigUtopia(U8 level, U8 extendedMode, U8 removeHec, U8 cellSize);
extern void BmeNIconfigCh(unsigned int portNum, int fastChnlNum, int ilvChnlNum);
extern void pollEthPhyCo (BYTE phyaddr);
extern void BmeNIenableCh(U8 port);
extern void testPIOWrite_diag (int BmeNum, unsigned long addr, unsigned long data);
extern void InitDma (int BmeNum);
extern void doDmaWrite(UINT32 destAddr, BYTE *dataPtr, UINT32 dataLen, int destFifoFlag);
extern int hostReadBMEMemories(char *dst, char *src, int len, int read_mode, int isFifo, int bmeChNum); 

extern void PrIniEnetPhyAutoNegotiate (U8 bEnetPortCount);

extern int dropFrameEnable;

extern char 	tmpBuf[0x400000];
#ifdef BME_CPE_20
  extern void readFpga(U8 addr);
  extern void writeFpga(U8 addr ,U8 data);
#endif

unsigned char charbar[] = {
  '\\',
  '|',
  '/',
  '-'
};
unsigned char ethchar[] = {
 0x7e,0xff, 0x03,0xde, 0xb7,0x01, 0x02,0x03, 0x04,0x05, 0x06,0x07,   
 0x08,0x09, 0x0a,0x0b, 0x0c,0x0c, 0x0d,0x0e, 0x0f,0x10, 0x11,0x12, 0x13,0x14, 0x15,0x16,   
 0x17,0x18, 0x19,0x1a, 0x1b,0x1c, 0x1d,0x1e, 0x1f,0x20, 0x21,0x22, 0x23,0x24, 0x25,0x26,   
 0x27,0x28, 0x29,0x2a, 0x2b,0x2c, 0x2d,0x2e, 0x2f,0x30, 0x31,0x32, 0xde,0xb7, 0x33,0x34,   
 0x35,0x36, 0x37,0x38, 0x39,0x3a, 0x3b,0x73, 0x0f,0xb4, 0x2b,0x55, 0xf7,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0xff,   
 0x03,0xde, 0xb7,0x01, 0x02,0x03, 0x04,0x05, 0x06,0x07, 0x08,0x09, 0x0a,0x0b, 0x0c,0x55,   
 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55,   
 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55,   
 0x55,0x55, 0x55,0x55, 0x55,0x55, 0xde,0xb7, 0x55,0x55, 0x55,0x55, 0x55,0x55, 0x55,0x55,   
 0x55,0xb5, 0xb0,0x13, 0x9d,0x0c, 0x90,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0xff, 0x03,0xde, 0xb7,0x01, 0x02,0x03,   
 0x04,0x05, 0x06,0x07, 0x08,0x09, 0x0a,0x0b, 0x0c,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa,   
 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa,   
 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa,   
 0xde,0xb7, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xaa, 0xaa,0xfe, 0x14,0x83, 0x89,0x4b,   
 0x8a,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0xff, 0x03,0xde, 0xb7,0x01, 0x02,0x03, 0x04,0x05, 0x06,0x07, 0x08,0x09,   
 0x0a,0x0b, 0x0c,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0,   
 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0,   
 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xf0,0xf0, 0xde,0xb7, 0xf0,0xf0, 0xf0,0xf0,   
 0xf0,0xf0, 0xf0,0xf0, 0xf0,0x6d, 0xa0,0xdf, 0x98,0xd7, 0x7c,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e,   
 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0x7e, 0x7e,0xff, 0x03,0xde   
};

void cloop (UINT32 loopCount, int cellCount) 
{ 

//  UINT32 ccr_status=0;
//  UINT32 data=0;
  UINT32 loopCountReal;
//  int i;
  UINT32 temp0=0,temp1=0;
  UINT32 uiLoopbackSize = cellCount * 53;
  UINT32 uiDmaCcr0 = (uiLoopbackSize << 16) | 0x1601;
  unsigned char bChar= 0x0d;
  unsigned char bChar1= 0;

  loopCountReal = loopCount+1;

  printf("\n Initialize BME NI");
  BmeNIreset();

  printf("\n Config BME Utopia");
  BmeNIconfigUtopia(0,0,0,53);

  printf("\n Config BME Utopia Channel");
  BmeNIconfigCh(0,0,-1);

//#ifdef	BME_CPE_20
#if 0

#ifdef RMII_MODE
  writeFpga (7,2);
#else
	writeFpga (7,6);
#endif

#endif

  printf("\n Initialize PTMF FPGA!");
  iposPtmfSetup(0);

  dropFrameEnable = 0;

  iposPtmfStartRx(1, 0);

  testPIOWrite_diag (1, 0xe0040100,0x0);
//    testPIORead (1, 0xe0040100);

  printf("\n Initialize DMA!");
  InitDma(1);

  printf("\n Enable BME Utopia Channel");
  BmeNIenableCh(0);

  printf("\n Start PTMF port!\n");
  
  iposPtmfStartTx(1, 0);
  
  while (loopCountReal)
  {
//	  printf ("\nWaiting for data in XFIFO... ");
    /*Waiting for FIFO condition to be True, Block = 8, Size = 53, Fullness= 1*/
    wait_for_fifo_data(0x8, 0xffff, 0xe0040000, 0xe0040100, 0x0, uiLoopbackSize, 1);

    printf("%c %c",bChar,charbar[bChar1&0x3]);

//    iposPtmfReadCounters(0);

#if defined(P2CPE)
    pollEthPhyCo(0);
#else    
    PrIniEnetPhyAutoNegotiate(0);
#endif

    /*Starting DMA from XFIFO to CFIFO*/
    /*Polling bit 6 of DMA_CCR register to see if DMA is active*/

    temp1=0xe0030000 & 0xfffffffc;
    pio_read (temp1,&temp0);
    temp0=temp0 & 0x40;

    while ((temp0&0x40) == 0x40)
    pio_read (temp1,&temp0);

//	  printf ("DMA from XFIFO to CFIFO\n");

    /*Programming DMA Channel Registers, SAR, DAR, ECR, CCR*/
    pio_write( 0xe0030080, 0xc0000000);   // SAR

    pio_write( 0xe00300c0, 0xc6000000);   // DAR

    pio_write( 0xe0030040, 0x80000000);   // EVR

    pio_write( 0xe0030000, uiDmaCcr0);   // CCR

    /*Polling bit 8 of DMA_CCR register to see if DMA is done*/
    pio_read (0xe0030000, (&temp0));
    temp0&=0x100;

    while((temp0 & 0x100) ==0x0 )
	    pio_read (0xe0030000, (&temp0));

    bChar1++;

    if (loopCount)
      loopCountReal--;
  }

  iposPtmfStopTx(1);
  iposPtmfStopRx(1);

	/* Read CFIFO/XFIFO rd/wr pointers */
	printf ("\nRead CFIFO/XFIFO rd/wr pointers");
	pio_read (0xe0040100, (&temp0));
	printf ("\nXFIFO: 0xe0040100 0x%lx",temp0);
	pio_read (0xe0068100, (&temp0));
	printf ("\nCFIFO: 0xe0068100 0x%lx",temp0);

}/*end of test*/

void cx_loop (int cellCount) 
{ 

    UINT32 temp0=0,temp1=0;
    UINT32 uiLoopbackSize = cellCount * 53;
    UINT32 uiDmaCcr0 = (uiLoopbackSize << 16) | 0x1201;

    printf("\n Initialize BME NI");
    BmeNIreset();

    printf("\n Config BME Utopia");
    BmeNIconfigUtopia(0,0,0,53);

    printf("\n Config BME Utopia Channel");
    BmeNIconfigCh(0,0,-1);

    printf("\n Initialize PTMF FPGA!");
    iposPtmfSetup(0);

    dropFrameEnable = 0;

    iposPtmfStartRx(1, 0);

    testPIOWrite_diag (1, 0xe0040100,0x0);

    printf("\n Initialize DMA!");
    InitDma(1);

    printf("\n Enable BME Utopia Channel");
    BmeNIenableCh(0);

    printf("\n Start PTMF port!\n");
  
    iposPtmfStartTx(1, 0);
  
    doDmaWrite(0x20000000, &ethchar[0], 0x100, 0);
    memset(&tmpBuf[0], 0x5a, 0x100);
    doDmaWrite(0xc0000000, &tmpBuf[0], 0x100, 0);

#if defined(P2CPE)
    pollEthPhyCo(0);
#else    
    PrIniEnetPhyAutoNegotiate(0);
#endif

    /*Starting DMA from XFIFO to CFIFO*/
    /*Polling bit 6 of DMA_CCR register to see if DMA is active*/

    temp1=0xe0030000 & 0xfffffffc;
    pio_read (temp1,&temp0);
    temp0=temp0 & 0x40;

    while ((temp0&0x40) == 0x40)
    pio_read (temp1,&temp0);

//	  printf ("DMA from XFIFO to CFIFO\n");

    /*Programming DMA Channel Registers, SAR, DAR, ECR, CCR*/
    pio_write( 0xe0030080, 0x20000000);   // SAR

    pio_write( 0xe00300c0, 0xc6000000);   // DAR

    pio_write( 0xe0030040, 0x80000000);   // EVR

    pio_write( 0xe0030000, uiDmaCcr0);   // CCR

    /*Polling bit 8 of DMA_CCR register to see if DMA is done*/
    pio_read (0xe0030000, (&temp0));
    temp0&=0x100;

    while((temp0 & 0x100) ==0x0 )
	    pio_read (0xe0030000, (&temp0));

    iposTaskDelay(240);

    hostReadBMEMemories (&tmpBuf[0], (char*)0xc0000000,0x100,1,0,0);
    if (!memcmp(&tmpBuf[0], &ethchar[0], 0x50))
        printf("\n\nEthernet loop back test passed.\n");
    else
        printf("\n\nEthernet loop back test failed.\n");
  
    iposPtmfStopTx(1);
    iposPtmfStopRx(1);


}/*end of test*/
#endif //INI_SUPPORT